University of Hertfordshire

A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Original languageEnglish
Title of host publication50th Midwest Symposium on Circuits and Systems, MWSCAS 2007
PublisherIEEE
Pages1517-1520
ISBN (Print)978-1-4244-1175-7
DOIs
Publication statusPublished - 2007

Abstract

The design and implementation of a CMOS continuous-time follow-the-leader-feedback (FLF) filter is described. The filter is implemented using a fully-differential linear, low voltage and low power consumption operational transconductance amplifier (OTA) based on a source degeneration topology. PSpice simulations using a standard TSMC 0.18 mum CMOS process with 2 V power supply have shown that the cut-off frequency of the filter ranges from 55 MHz to 160 MHz and dynamic range is about 45 dB. The group delay is less than 5% over the whole tuning range; the power consumption is only 9 mW.

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