University of Hertfordshire

By the same authors

A Single-Path Chip-Multiprocessor System

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Original languageEnglish
Title of host publicationProceedings of Software technologies for Embedded and Ubiquitous Systems
Subtitle of host publicationLecture Notes in Computer Science
EditorsS Lee, P Narasimhan
Place of PublicationBerlin
PublisherSpringer
Pages47-57
Number of pages11
Volume5860
Edition1st
ISBN (Print)978-3-642-10264-6
DOIs
Publication statusPublished - 2009
EventSEUS 2009 - Newport, United Kingdom
Duration: 16 Nov 200918 Nov 2009

Publication series

NameLecture Notes in Computer Science
PublisherSpringer

Conference

ConferenceSEUS 2009
CountryUnited Kingdom
CityNewport
Period16/11/0918/11/09

Abstract

In this paper we explore the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.

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