University of Hertfordshire

A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications

Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Xiaobao Yu
  • Meng Wei
  • Yun Yin
  • Ying Song
  • Zhihua Wang
  • Yichuang Sun
  • Baoyong Chi
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Original languageEnglish
Title of host publicationProceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)9781479976416
Publication statusPublished - 25 Nov 2015
EventIEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015 - Phoenix, United States
Duration: 17 May 201519 May 2015


ConferenceIEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015
CountryUnited States


A fully-integrated Sub-GHz low-power transceiver (TRX) for 802.11ah applications is presented. The receiver takes both advantages of Low-IF/Zero-IF architectures while supporting 1/2/8MHz reconfigurable signal bandwidth. A Σ-Δ fractional-N PLL with Class-C VCO is employed to provide the LOs. In order to enhance the power amplifier (PA) back-off efficiency, a Peak-to-Average-Power-Ratio (PAPR) tolerant technique is proposed with the aid of a power control loop to dynamically detect the input signal PAPR and flexibly reconfigures the PA's operation modes. With digitally-assisted self-calibrations for LO leakage and image rejection, the transmitter obtains -51.6dBc LO leakage and 51.2dBc image rejection ratio (IRR). A JESD207 interface is also included to communicate with the digital baseband. Implemented in 180nm CMOS, the receiver achieves 4dB NF and dissipates 18.9mW from a 1.7V supply. The CMOS PA achieves 13.6dBm output P1dB with 25.5% PAE in high power mode (HPM) and ×2.61 PAE improvement at 7dB back-off power in low power mode (LPM).

ID: 15579492