University of Hertfordshire

Analysis of BTI aging of level shifters

Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Jiajing Cai
  • Basel Halak
  • Daniele Rossi
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Original languageEnglish
Title of host publication2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages17-18
Number of pages2
ISBN (Electronic)9781509015061
DOIs
Publication statusPublished - 20 Oct 2016
Event22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016 - Sant Feliu de Guixols, Catalunya, Spain
Duration: 4 Jul 20166 Jul 2016

Conference

Conference22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016
CountrySpain
CitySant Feliu de Guixols, Catalunya
Period4/07/166/07/16

Abstract

This paper provides a comprehensive evaluation of the effects of Bias Temperature Instability (BTI) aging on the delay of level shifters. The latter are indispensable blocks in energy efficient systems with multiple supply voltages. Our results show that conventional level-up shifters exhibit significantly more aging-induced delay degradation compared to standard logic cells. Our experiments performed in a predictive 32nm technology indicate those designs can suffer from more than 200% increase in their delay after 5 years due to BTI aging compared to an average of 20% delay rise in the case of standard CMOS logic. Our investigations show that the reason behind this phenomenon is the differential signaling structure present in the majority of conventional level up shifters, combined with the use of low supply voltages.

ID: 13199046