University of Hertfordshire

By the same authors

Design of Highly Parallel Architectures with Alpha and Handel

Research output: Chapter in Book/Report/Conference proceedingChapter (peer-reviewed)

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Original languageEnglish
Title of host publicationSystem Specification & Design Languages
Subtitle of host publicationBest of FDL'02
EditorsE. Villar , J. Mermet
PublisherSpringer
Chapter24
Pages293-302
Edition1
ISBN (Electronic)978-0-306-48734-7
ISBN (Print)978-1-4020-7414-1
DOIs
Publication statusPublished - 2003

Abstract

We propose a bridge between two important parallel programming paradigms: data parallelism and communicating sequential processes (CSP). Data parallel pipelined architectures obtained with the Alpha language can be embedded in a control intensive application expressed in CSP-based Handel formalism. The interface is formally defined from the semantics of the languages Alpha and Handel. This work will ease the design of compute intensive applications on FPGAs.

Notes

© Kluwer Academic Publishers 2003

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