University of Hertfordshire

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    Accepted author manuscript, 1 MB, PDF-document

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Original languageEnglish
Article number8641453
Number of pages8
Pages (from-to)1174-1181
JournalIEEE Transactions on Electron Devices
Journal publication date1 Mar 2019
Volume66
Issue3
DOIs
Publication statusPublished - 1 Mar 2019

Abstract

In this paper, a novel design approach is proposed for on-chip bandpass filter (BPF) design with improved passband flatness and stopband suppression. The proposed approach simply uses a combination of meander-line structures with metal-insulator-metal (MIM) capacitors. To demonstrate the insight of this approach, a simplified equivalent LC-circuit model is used for theoretical analysis. Using the analyzed results as a guideline along with a full-wave electromagnetic (EM) simulator, two BPFs are designed and implemented in a standard 0.13-μm (Bi)-CMOS technology. The measured results show that good agreements between EM simulated and measured results are achieved. For the first BPF, the return loss is better than 10 dB from 13.5 to 32 GHz, which indicates a fractional bandwidth (FBW) of more than 78%. In addition, the minimum insertion loss of 2.3 dB is achieved within the frequency range from 17 to 27 GHz and the in-band magnitude ripple is less than 0.1 dB. The chip size of this design, excluding the pads, is 0.148 mm 2 . To demonstrate a miniaturized design, a second design example is given. The return loss is better than 10 dB from 17.3 to 35.9 GHz, which indicates an FBW of more than 70%. In addition, the minimum insertion loss of 2.6 dB is achieved within the frequency range from 21.4 to 27.7 GHz and the in-band magnitude ripple is less than 0.1 dB. The chip size of the second design, excluding the pads, is only 0.066 mm 2 .

ID: 16435082