University of Hertfordshire

DIGITAL SIGNAL PROCESSING

Research output: Patent

Standard

DIGITAL SIGNAL PROCESSING. / Findlay, Paul (Inventor); Johnson, Brian (Inventor); Guppy, John (Inventor).

IPC No.:  . Patent No.: EP0350278.

Research output: Patent

Harvard

Findlay, P, Johnson, B & Guppy, J 1992, DIGITAL SIGNAL PROCESSING, Patent No. EP0350278, IPC No.  .

APA

Findlay, P., Johnson, B., & Guppy, J. (1992). IPC No.  . DIGITAL SIGNAL PROCESSING. (Patent No. EP0350278).

Vancouver

Findlay P, Johnson B, Guppy J, inventors. DIGITAL SIGNAL PROCESSING.  . 1992 Jun 9.

Author

Findlay, Paul (Inventor) ; Johnson, Brian (Inventor) ; Guppy, John (Inventor). / DIGITAL SIGNAL PROCESSING. IPC No.:  . Patent No.: EP0350278.

Bibtex

@misc{2d4832033d0e42fa9b8a530ae7ae683b,
title = "DIGITAL SIGNAL PROCESSING",
abstract = "For more convenient mechanisation, the modulo m reduction of a binary number P can be carried out by conditionally summing the modulo m reductions of a power series of two and then modulo m reducing the sum. The modulo m reductions of the series, called the 'residues' of the series, can be pre-calculated and stored but this may be inconvenient if they are long in terms of numbers of bits. Herein, the residues are calculated in sequence by a recursive process, each residue being calculated from the next preceeding one, this leading to a 'serial' arrangement for generating the residues which can be incorporated into a serial modulo m reduction unit. Such a serial modulo m reduction unit is convenient for implementation as an integrated circuit especially as part of an overall circuit for encryption and decryption of digital signals.",
keywords = "recursive summing residues, modulo reduction",
author = "Paul Findlay and Brian Johnson and John Guppy",
year = "1992",
month = "6",
day = "9",
language = "English",
type = "Patent",
note = "EP0350278;  ",

}

RIS

TY - PAT

T1 - DIGITAL SIGNAL PROCESSING

AU - Findlay, Paul

AU - Johnson, Brian

AU - Guppy, John

PY - 1992/6/9

Y1 - 1992/6/9

N2 - For more convenient mechanisation, the modulo m reduction of a binary number P can be carried out by conditionally summing the modulo m reductions of a power series of two and then modulo m reducing the sum. The modulo m reductions of the series, called the 'residues' of the series, can be pre-calculated and stored but this may be inconvenient if they are long in terms of numbers of bits. Herein, the residues are calculated in sequence by a recursive process, each residue being calculated from the next preceeding one, this leading to a 'serial' arrangement for generating the residues which can be incorporated into a serial modulo m reduction unit. Such a serial modulo m reduction unit is convenient for implementation as an integrated circuit especially as part of an overall circuit for encryption and decryption of digital signals.

AB - For more convenient mechanisation, the modulo m reduction of a binary number P can be carried out by conditionally summing the modulo m reductions of a power series of two and then modulo m reducing the sum. The modulo m reductions of the series, called the 'residues' of the series, can be pre-calculated and stored but this may be inconvenient if they are long in terms of numbers of bits. Herein, the residues are calculated in sequence by a recursive process, each residue being calculated from the next preceeding one, this leading to a 'serial' arrangement for generating the residues which can be incorporated into a serial modulo m reduction unit. Such a serial modulo m reduction unit is convenient for implementation as an integrated circuit especially as part of an overall circuit for encryption and decryption of digital signals.

KW - recursive summing residues

KW - modulo reduction

M3 - Patent

M1 - EP0350278

ER -