University of Hertfordshire

By the same authors

Efficient Leader Election for Synchronous Shared-Memory Systems

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Original languageEnglish
Title of host publicationProc. Int'l Workshop on Performance, Power and Predictability of Many-Core Embedded Systems (3PMCES'14)
Place of PublicationDresden, Germany
PublisherElectronic Chips and Systems Design Initiative ECSI
Number of pages5
Publication statusPublished - Mar 2014

Abstract

Leader election is a frequent problem for systems where it is important to coordinate activities of a group of actors. It has been extensively studied in the context of networked systems. But with the raise of many-core computer architectures, it also became important for shared-memory systems.
In this paper we present an efficient leader election technique for synchronous shared-memory systems. Synchronous in our context means the response time of code sections with relevant communication patterns is bounded. Our leader election method is used to help making the scheduling layer LPEL fault tolerant.With our approach LPEL will be efficient to resolve problems when the leader fails.

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