University of Hertfordshire

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    Accepted author manuscript, 1 MB, PDF-document

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Original languageEnglish
Number of pages10
Pages (from-to)4062-4071
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Journal publication date12 Dec 2018
Volume65
Issue12
Early online date15 Jun 2018
DOIs
Publication statusPublished - 12 Dec 2018

Abstract

This paper introduces a unique approach for the implementation of a miniaturized on-chip resonator and its application for the first-order bandpass filter (BPF) design. This approach utilizes a combination of a broadside-coupling technique and a split-ring structure. To fully understand the principle behind it, simplified LC equivalent-circuit models are provided. By analyzing these models, guidelines for implementation of an ultra-compact resonator and a BPF are given. To further demonstrate the feasibility of using this approach in practice, both the implemented resonator and the filter are fabricated in a standard 0.13-μm (Bi)-CMOS technology. The measured results show that the resonator can generate a resonance at 66.75 GHz, while the BPF has a center frequency at 40 GHz and an insertion loss of 1.7 dB. The chip size of both the resonator and the BPF, excluding the pads, is only 0.012mm 2 (0.08 × 0.144 mm 2).

Notes

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