Abstract
In this work, a ten-way power-combined power
amplifier is designed using a load modulated balanced amplifier
(LMBA)-based architecture. To provide the required magnitude
and phase controls between the main and control-signal paths of
the LMBA, an unequal power splitter and a phase compensation
network are proposed. As proof of concept, the designed power
amplifier is implemented in a 45-nm SOI CMOS process. At 40
GHz, it delivers a 25.1 dBm Psat with a peak power-added
efficiency (PAE) of 27.9%. At 6-dB power back-off level, it
achieves 1.39 times drain efficiency enhancement over an ideal
Class-B power amplifier. Using a 200-MHz single-carrier 64-QAM
signal, the designed amplifier delivers an average output power of
16.5 dBm with a PAE of 13.1% at an EVMrms of -23.9 dB and
ACPR of -25.3 dBc. The die size, including all testing pads, is only
1.92 mm2. To the best of the authors’ knowledge, compared with
the other recently published silicon-based LMBAs, this design
achieves the highest Psat.
amplifier is designed using a load modulated balanced amplifier
(LMBA)-based architecture. To provide the required magnitude
and phase controls between the main and control-signal paths of
the LMBA, an unequal power splitter and a phase compensation
network are proposed. As proof of concept, the designed power
amplifier is implemented in a 45-nm SOI CMOS process. At 40
GHz, it delivers a 25.1 dBm Psat with a peak power-added
efficiency (PAE) of 27.9%. At 6-dB power back-off level, it
achieves 1.39 times drain efficiency enhancement over an ideal
Class-B power amplifier. Using a 200-MHz single-carrier 64-QAM
signal, the designed amplifier delivers an average output power of
16.5 dBm with a PAE of 13.1% at an EVMrms of -23.9 dB and
ACPR of -25.3 dBc. The die size, including all testing pads, is only
1.92 mm2. To the best of the authors’ knowledge, compared with
the other recently published silicon-based LMBAs, this design
achieves the highest Psat.
| Original language | English |
|---|---|
| Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
| Publication status | Accepted/In press - 23 May 2023 |