This paper outlines the popular circuit tuning strategies reported for the implementation of reconfigurable low-noise amplifiers (LNAs). It presents a continuously-tuned LNA intended for multi-standard applications as well as enhancing the yield of conventional narrowband LNAs. The presented LNA is designed and implemented in a 0.25μm silicon-on-sapphire (SOS) CMOS process. It uses MOS-varactors at the output to continuously tune its load resonance frequency and input matching frequency without the need of a tunable input network, achieving optimized power consumption and noise figure (NF). The post-layout simulations show that the designed LNA can be continuously tuned from 2.6 GHz to 3.5 GHz. Over this frequency range, an input IP3 of of -12 dB, gain of 17 dB and a NF of less than 2 dB have been achieved with 3.4 mW of power consumption at 1.8V.
|Title of host publication||2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013|
|Number of pages||4|
|Publication status||Published - 9 Sept 2013|
|Event||2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China|
Duration: 19 May 2013 → 23 May 2013
|Conference||2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013|
|Period||19/05/13 → 23/05/13|