Abstract
Spiking neural networks (SNNs) are biologicallyplausible and computationally powerful. The current computingsystems based on the von Neumann architecture are almostthe hardware basis for the implementation of SNNs. However,performance bottlenecks in computing speed, cost, and energyconsumption hinder the hardware development of SNNs. Therefore,efficient non-Neumann hardware computing systems forSNNs remain to be explored. In this paper, a selective supervisedalgorithm for spiking neurons inspired by the selective attentionmechanism is proposed, and a memristive spiking neuron circuitas well as a memristive SNN circuit based on the proposedalgorithm are designed. The memristor realizes the learningand memory of the synaptic weight. The proposed algorithmincludes a top-down selective supervision method and a bottomupselective supervision method. Compared with other supervisedalgorithms, the proposed algorithm has excellent performance onsequence learning. Moreover, top-down and bottom-up attentionencoding circuits are designed to provide the hardware foundationfor encoding external stimuli into top-down and bottomupattention spikes, respectively. The proposed memristive SNNcircuit can perform classification on the MNIST dataset and theFashion-MNIST dataset with superior accuracy after learninga small number of labeled samples, which greatly reduces thecost of manual annotation and improves the supervised learningefficiency of the memristive SNN circuit.
Original language | English |
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Pages (from-to) | 2604-2617 |
Number of pages | 14 |
Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Volume | 42 |
Issue number | 8 |
Early online date | 14 Dec 2022 |
DOIs | |
Publication status | Published - 8 Aug 2023 |
Keywords
- Biological neural networks
- Encoding
- Hardware
- Memristors
- Neurons
- Selective attention
- Supervised learning
- Synapses
- circuit design
- image classification
- memristor
- sequence learning
- spiking neural network
- supervised algorithm