A modified merging approach for datapath configuration time reduction

Ali Zakerolhosseini, Georgi Gaydadjiev

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

This paper represents a modified datapath merging technique to amortize the configuration latency of mapping datapaths on reconfigurable fabric in Run-Time Reconfigurable Systems (RTR). This method embeds together the different Data Flow Graphs (DFGs), corresponding to the loop kernels to create a single datapath (merged datapath) instead of multiple datapaths. The DFGs are merged in steps where each step corresponds to combining a DFG onto the merged datapath. Afterwards, the method combines the resources inside the merged datapath to minimize the configuration time by employing the maximum weighted clique technique. The proposed merging technique is evaluated using the Media-bench suit workloads. The results indicate that our technique outperforms previous HLS approaches aimed at RTR systems and reduces the datapath configuration time up to 10%.

Original languageEnglish
Title of host publicationReconfigurable Computing
Subtitle of host publicationArchitectures, Tools and Applications - 6th International Symposium, ARC 2010, Proceedings
Pages318-328
Number of pages11
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event6th International Symposium on Applied Reconfigurable Computing, ARC 2010 - Bangkok, Thailand
Duration: 17 Mar 201019 Mar 2010

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume5992 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference6th International Symposium on Applied Reconfigurable Computing, ARC 2010
Country/TerritoryThailand
CityBangkok
Period17/03/1019/03/10

Keywords

  • CAD algorithms for FPGA and reconfigurable systems
  • Reconfigurable computers
  • Run-time reconfiguration

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