TY - GEN
T1 - A neural network approach for fault diagnosis of large-scale analogue circuits
AU - He, Y.
AU - Tan, Y.
AU - Sun, Y.
N1 - “This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.”
PY - 2002
Y1 - 2002
N2 - An approach for fault diagnosis of large-scale analogue circuits using neural networks is presented in the paper. This method is based on the fault dictionary technique, but it can deal with soft faults due to the robustness of neural networks. Because the neural networks can create the fault dictionary, memorize and verify it simultaneously, computation time is drastically reduced. Rather than dealing with the whole circuit directly, the proposed approach partitions a large-scale circuit into several small sub-circuits and then tests each sub-circuit using the neural network method. The principle and diagnosis procedure of the method are described. Two examples are given to illustrate the method for both small and large-scale circuits.
AB - An approach for fault diagnosis of large-scale analogue circuits using neural networks is presented in the paper. This method is based on the fault dictionary technique, but it can deal with soft faults due to the robustness of neural networks. Because the neural networks can create the fault dictionary, memorize and verify it simultaneously, computation time is drastically reduced. Rather than dealing with the whole circuit directly, the proposed approach partitions a large-scale circuit into several small sub-circuits and then tests each sub-circuit using the neural network method. The principle and diagnosis procedure of the method are described. Two examples are given to illustrate the method for both small and large-scale circuits.
U2 - 10.1109/ISCAS.2002.1009800
DO - 10.1109/ISCAS.2002.1009800
M3 - Conference contribution
SN - 0-7803-7448-7
VL - 1
SP - 153
EP - 156
BT - Procs IEEE Int Symposium on Circuits & Systems
PB - Institute of Electrical and Electronics Engineers (IEEE)
ER -