Keyphrases
Bandwidth Limitation
25%
Benchmark Circuits
25%
Block Utilization
25%
CAD Flow
25%
Circuit Design
25%
Circuit Performance
25%
Clustering Algorithm
25%
Clustering Approach
25%
Configurable Logic Block
100%
Design Performance
25%
Device Utilization
50%
EDA Flow
25%
FPGA CAD
25%
Hardware Constraints
25%
In Clustering
25%
Input Bandwidth
25%
Multi-objective Genetic Algorithm
25%
Multi-objective Optimization Algorithm
100%
Performance Parameters
25%
Place-and-route
25%
Routability
100%
Target Architecture
25%
Timing-driven
100%
Computer Science
Achievable Performance
20%
Benchmark Circuit
20%
Clustering Algorithm
20%
clustering approach
20%
Computer Aided Design
20%
Computer Hardware
20%
Configurable Logic Block
80%
Field Programmable Gate Arrays
100%
multi-objective evolutionary algorithm
20%
Multi-Objective Optimization
100%
Optimization Algorithm
100%
Performance Parameter
20%
Engineering
Circuit Design
20%
Circuit Performance
20%
Clustering Algorithm
20%
Computer Aided Design
20%
Driven Circuit
100%
Field Programmable Gate Arrays
100%
Fundamental Process
20%
Improving Device
20%
Interconnects
20%
Multiobjective Genetic Algorithm
20%
Multiobjective Optimization
100%
Performance Parameter
20%
Process Route
20%