A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications

Xiaobao Yu; Meng Wei; Yun Yin; Ying Song; Zhihua Wang; Yichuang Sun; Baoyong Chi

doi:10.1109/RFIC.2015.7337747

A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications

Xiaobao Yu, Meng Wei, Yun Yin, Ying Song, Zhihua Wang, Yichuang Sun, Baoyong Chi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

13 Citations (Scopus)

Abstract

A fully-integrated Sub-GHz low-power transceiver (TRX) for 802.11ah applications is presented. The receiver takes both advantages of Low-IF/Zero-IF architectures while supporting 1/2/8MHz reconfigurable signal bandwidth. A Σ-Δ fractional-N PLL with Class-C VCO is employed to provide the LOs. In order to enhance the power amplifier (PA) back-off efficiency, a Peak-to-Average-Power-Ratio (PAPR) tolerant technique is proposed with the aid of a power control loop to dynamically detect the input signal PAPR and flexibly reconfigures the PA's operation modes. With digitally-assisted self-calibrations for LO leakage and image rejection, the transmitter obtains -51.6dBc LO leakage and 51.2dBc image rejection ratio (IRR). A JESD207 interface is also included to communicate with the digital baseband. Implemented in 180nm CMOS, the receiver achieves 4dB NF and dissipates 18.9mW from a 1.7V supply. The CMOS PA achieves 13.6dBm output P1dB with 25.5% PAE in high power mode (HPM) and ×2.61 PAE improvement at 7dB back-off power in low power mode (LPM).

Original language	English
Title of host publication	Proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	231-234
Number of pages	4
Volume	2015-November
ISBN (Electronic)	9781479976416
DOIs	https://doi.org/10.1109/RFIC.2015.7337747
Publication status	Published - 25 Nov 2015
Event	IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015 - Phoenix, United States Duration: 17 May 2015 → 19 May 2015

Conference

Conference	IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015
Country/Territory	United States
City	Phoenix
Period	17/05/15 → 19/05/15

Keywords

802.11ah
CMOS
digital self-calibration
low-power
PAPR
power amplifier
transceiver

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10.1109/RFIC.2015.7337747Licence: Other

Cite this

Yu, X., Wei, M., Yin, Y., Song, Y., Wang, Z., Sun, Y., & Chi, B. (2015). A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications. In Proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015 (Vol. 2015-November, pp. 231-234). Article 7337747 Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/RFIC.2015.7337747

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title = "A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications",

abstract = "A fully-integrated Sub-GHz low-power transceiver (TRX) for 802.11ah applications is presented. The receiver takes both advantages of Low-IF/Zero-IF architectures while supporting 1/2/8MHz reconfigurable signal bandwidth. A Σ-Δ fractional-N PLL with Class-C VCO is employed to provide the LOs. In order to enhance the power amplifier (PA) back-off efficiency, a Peak-to-Average-Power-Ratio (PAPR) tolerant technique is proposed with the aid of a power control loop to dynamically detect the input signal PAPR and flexibly reconfigures the PA's operation modes. With digitally-assisted self-calibrations for LO leakage and image rejection, the transmitter obtains -51.6dBc LO leakage and 51.2dBc image rejection ratio (IRR). A JESD207 interface is also included to communicate with the digital baseband. Implemented in 180nm CMOS, the receiver achieves 4dB NF and dissipates 18.9mW from a 1.7V supply. The CMOS PA achieves 13.6dBm output P1dB with 25.5% PAE in high power mode (HPM) and ×2.61 PAE improvement at 7dB back-off power in low power mode (LPM).",

keywords = "802.11ah, CMOS, digital self-calibration, low-power, PAPR, power amplifier, transceiver",

author = "Xiaobao Yu and Meng Wei and Yun Yin and Ying Song and Zhihua Wang and Yichuang Sun and Baoyong Chi",

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Yu, X, Wei, M, Yin, Y, Song, Y, Wang, Z, Sun, Y & Chi, B 2015, A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications. in Proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015. vol. 2015-November, 7337747, Institute of Electrical and Electronics Engineers (IEEE), pp. 231-234, IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015, Phoenix, United States, 17/05/15. https://doi.org/10.1109/RFIC.2015.7337747

A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications. / Yu, Xiaobao; Wei, Meng; Yin, Yun et al.
Proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015. Vol. 2015-November Institute of Electrical and Electronics Engineers (IEEE), 2015. p. 231-234 7337747.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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T1 - A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications

AU - Yu, Xiaobao

AU - Wei, Meng

AU - Yin, Yun

AU - Song, Ying

AU - Wang, Zhihua

AU - Sun, Yichuang

AU - Chi, Baoyong

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N2 - A fully-integrated Sub-GHz low-power transceiver (TRX) for 802.11ah applications is presented. The receiver takes both advantages of Low-IF/Zero-IF architectures while supporting 1/2/8MHz reconfigurable signal bandwidth. A Σ-Δ fractional-N PLL with Class-C VCO is employed to provide the LOs. In order to enhance the power amplifier (PA) back-off efficiency, a Peak-to-Average-Power-Ratio (PAPR) tolerant technique is proposed with the aid of a power control loop to dynamically detect the input signal PAPR and flexibly reconfigures the PA's operation modes. With digitally-assisted self-calibrations for LO leakage and image rejection, the transmitter obtains -51.6dBc LO leakage and 51.2dBc image rejection ratio (IRR). A JESD207 interface is also included to communicate with the digital baseband. Implemented in 180nm CMOS, the receiver achieves 4dB NF and dissipates 18.9mW from a 1.7V supply. The CMOS PA achieves 13.6dBm output P1dB with 25.5% PAE in high power mode (HPM) and ×2.61 PAE improvement at 7dB back-off power in low power mode (LPM).

AB - A fully-integrated Sub-GHz low-power transceiver (TRX) for 802.11ah applications is presented. The receiver takes both advantages of Low-IF/Zero-IF architectures while supporting 1/2/8MHz reconfigurable signal bandwidth. A Σ-Δ fractional-N PLL with Class-C VCO is employed to provide the LOs. In order to enhance the power amplifier (PA) back-off efficiency, a Peak-to-Average-Power-Ratio (PAPR) tolerant technique is proposed with the aid of a power control loop to dynamically detect the input signal PAPR and flexibly reconfigures the PA's operation modes. With digitally-assisted self-calibrations for LO leakage and image rejection, the transmitter obtains -51.6dBc LO leakage and 51.2dBc image rejection ratio (IRR). A JESD207 interface is also included to communicate with the digital baseband. Implemented in 180nm CMOS, the receiver achieves 4dB NF and dissipates 18.9mW from a 1.7V supply. The CMOS PA achieves 13.6dBm output P1dB with 25.5% PAE in high power mode (HPM) and ×2.61 PAE improvement at 7dB back-off power in low power mode (LPM).

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KW - PAPR

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KW - transceiver

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BT - Proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015

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ER -

A Sub-GHz low-power transceiver with PAPR-tolerant power amplifier for 802.11ah applications

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Keywords

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