A unified addition structure for moduli set {2n-1, 2 n,2n+1} based on a novel RNS representation

Somayeh Timarchi, Sorin D.cotofana

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

Given that modulo 2n±1 are the most popular moduli in Residue Number Systems (RNS), a large variety of modulo 2n±1 adder designs have been proposed based on different number representations. However, in most of the cases, these encodings do not allow the implementation of a unified adder for all the moduli of the form 2n-1, 2 n, and 2n+1. In this paper, we address the modular addition issue by introducing a new encoding, namely, the storedunibit RNS. Moreover, we demonstrate how the proposed representation can be utilized to derive a unified design for the moduli set {2n-1,2n,2 n+1}. Our approach enables a unified design for the moduli set adders, which opens the possibility to design reliable RNS processors with low hardware redundancy. Moreover, the proposed representation can be utilized in conjunction with any fast state of the art binary adder without requiring any extra hardware for end-around-carry addition.

Original languageEnglish
Title of host publication2010 IEEE International Conference on Computer Design, ICCD 2010
Pages247-252
Number of pages6
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event28th IEEE International Conference on Computer Design, ICCD 2010 - Amsterdam, Netherlands
Duration: 3 Oct 20106 Oct 2010

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)1063-6404

Conference

Conference28th IEEE International Conference on Computer Design, ICCD 2010
Country/TerritoryNetherlands
CityAmsterdam
Period3/10/106/10/10

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