Analysis of BTI aging of level shifters

Jiajing Cai; Basel Halak; Daniele Rossi

doi:10.1109/IOLTS.2016.7604662

Analysis of BTI aging of level shifters

Jiajing Cai, Basel Halak, Daniele Rossi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

This paper provides a comprehensive evaluation of the effects of Bias Temperature Instability (BTI) aging on the delay of level shifters. The latter are indispensable blocks in energy efficient systems with multiple supply voltages. Our results show that conventional level-up shifters exhibit significantly more aging-induced delay degradation compared to standard logic cells. Our experiments performed in a predictive 32nm technology indicate those designs can suffer from more than 200% increase in their delay after 5 years due to BTI aging compared to an average of 20% delay rise in the case of standard CMOS logic. Our investigations show that the reason behind this phenomenon is the differential signaling structure present in the majority of conventional level up shifters, combined with the use of low supply voltages.

Original language	English
Title of host publication	2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	17-18
Number of pages	2
ISBN (Electronic)	9781509015061
DOIs	https://doi.org/10.1109/IOLTS.2016.7604662
Publication status	Published - 20 Oct 2016
Event	22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016 - Sant Feliu de Guixols, Catalunya, Spain Duration: 4 Jul 2016 → 6 Jul 2016

Conference

Conference	22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016
Country/Territory	Spain
City	Sant Feliu de Guixols, Catalunya
Period	4/07/16 → 6/07/16

Keywords

aging
BTI
delay
Level shifters
multi-power domains

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10.1109/IOLTS.2016.7604662

Cite this

@inproceedings{4b0d1fcf53d6469aacbc646d9fa5e17e,

title = "Analysis of BTI aging of level shifters",

abstract = "This paper provides a comprehensive evaluation of the effects of Bias Temperature Instability (BTI) aging on the delay of level shifters. The latter are indispensable blocks in energy efficient systems with multiple supply voltages. Our results show that conventional level-up shifters exhibit significantly more aging-induced delay degradation compared to standard logic cells. Our experiments performed in a predictive 32nm technology indicate those designs can suffer from more than 200% increase in their delay after 5 years due to BTI aging compared to an average of 20% delay rise in the case of standard CMOS logic. Our investigations show that the reason behind this phenomenon is the differential signaling structure present in the majority of conventional level up shifters, combined with the use of low supply voltages.",

keywords = "aging, BTI, delay, Level shifters, multi-power domains",

author = "Jiajing Cai and Basel Halak and Daniele Rossi",

year = "2016",

month = oct,

day = "20",

doi = "10.1109/IOLTS.2016.7604662",

language = "English",

pages = "17--18",

booktitle = "2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

address = "United States",

note = "22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016 ; Conference date: 04-07-2016 Through 06-07-2016",

}

Cai, J, Halak, B & Rossi, D 2016, Analysis of BTI aging of level shifters. in 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016., 7604662, Institute of Electrical and Electronics Engineers (IEEE), pp. 17-18, 22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016, Sant Feliu de Guixols, Catalunya, Spain, 4/07/16. https://doi.org/10.1109/IOLTS.2016.7604662

TY - GEN

T1 - Analysis of BTI aging of level shifters

AU - Cai, Jiajing

AU - Halak, Basel

AU - Rossi, Daniele

PY - 2016/10/20

Y1 - 2016/10/20

N2 - This paper provides a comprehensive evaluation of the effects of Bias Temperature Instability (BTI) aging on the delay of level shifters. The latter are indispensable blocks in energy efficient systems with multiple supply voltages. Our results show that conventional level-up shifters exhibit significantly more aging-induced delay degradation compared to standard logic cells. Our experiments performed in a predictive 32nm technology indicate those designs can suffer from more than 200% increase in their delay after 5 years due to BTI aging compared to an average of 20% delay rise in the case of standard CMOS logic. Our investigations show that the reason behind this phenomenon is the differential signaling structure present in the majority of conventional level up shifters, combined with the use of low supply voltages.

AB - This paper provides a comprehensive evaluation of the effects of Bias Temperature Instability (BTI) aging on the delay of level shifters. The latter are indispensable blocks in energy efficient systems with multiple supply voltages. Our results show that conventional level-up shifters exhibit significantly more aging-induced delay degradation compared to standard logic cells. Our experiments performed in a predictive 32nm technology indicate those designs can suffer from more than 200% increase in their delay after 5 years due to BTI aging compared to an average of 20% delay rise in the case of standard CMOS logic. Our investigations show that the reason behind this phenomenon is the differential signaling structure present in the majority of conventional level up shifters, combined with the use of low supply voltages.

KW - aging

KW - BTI

KW - delay

KW - Level shifters

KW - multi-power domains

UR - http://www.scopus.com/inward/record.url?scp=84997107955&partnerID=8YFLogxK

U2 - 10.1109/IOLTS.2016.7604662

DO - 10.1109/IOLTS.2016.7604662

M3 - Conference contribution

AN - SCOPUS:84997107955

SP - 17

EP - 18

BT - 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - 22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016

Y2 - 4 July 2016 through 6 July 2016

ER -

Analysis of BTI aging of level shifters

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