Design of Highly Parallel Architectures with Alpha and Handel

Florent de Dinechin, Manju Manjunathaiah, Tanguy Risset, M. Spivey

Research output: Chapter in Book/Report/Conference proceedingChapter (peer-reviewed)peer-review


We propose a bridge between two important parallel programming paradigms: data parallelism and communicating sequential processes (CSP). Data parallel pipelined architectures obtained with the Alpha language can be embedded in a control intensive application expressed in CSP-based Handel formalism. The interface is formally defined from the semantics of the languages Alpha and Handel. This work will ease the design of compute intensive applications on FPGAs.

Original languageEnglish
Title of host publicationSystem Specification & Design Languages
Subtitle of host publicationBest of FDL'02
EditorsE. Villar , J. Mermet
PublisherSpringer Nature
ISBN (Electronic)978-0-306-48734-7
ISBN (Print)978-1-4020-7414-1
Publication statusPublished - 2003


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