Design of highly parallel architectures with Alpha and Handel

Florent  de Dinechin; Tanguy Risset; Manju Manjunathaiah; M.  Spivey

doi:10.1007/0-306-48734-9_24

Design of highly parallel architectures with Alpha and Handel

Florent de Dinechin, Tanguy Risset, Manju Manjunathaiah, M. Spivey

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We propose a bridge between two important parallel programming paradigms: data parallelism and communicating sequential processes (CSP). Data parallel pipelined architectures obtained with the Alpha language can be embedded in a control intensive application expressed in CSP-based Handel formalism. The interface is formally defined from the semantics of the languages Alpha and Handel. This work will ease the design of compute intensive applications on FPGAs.

Original language	English
Title of host publication	System Specification & Design Languages
Subtitle of host publication	Best of FDL’02
Publisher	Springer Nature
Chapter	24
Pages	293-302
ISBN (Electronic)	978-0-306-48734-7
ISBN (Print)	978-1-4020-7414-1
DOIs	https://doi.org/10.1007/0-306-48734-9_24
Publication status	Published - Sept 2002
Event	Forum on Design Languages - Marseille, France Duration: 12 Sept 2002 → …

Conference

Conference	Forum on Design Languages
Country/Territory	France
City	Marseille
Period	12/09/02 → …

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10.1007/0-306-48734-9_24Licence: Other

Cite this

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title = "Design of highly parallel architectures with Alpha and Handel",

abstract = "We propose a bridge between two important parallel programming paradigms: data parallelism and communicating sequential processes (CSP). Data parallel pipelined architectures obtained with the Alpha language can be embedded in a control intensive application expressed in CSP-based Handel formalism. The interface is formally defined from the semantics of the languages Alpha and Handel. This work will ease the design of compute intensive applications on FPGAs.",

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AB - We propose a bridge between two important parallel programming paradigms: data parallelism and communicating sequential processes (CSP). Data parallel pipelined architectures obtained with the Alpha language can be embedded in a control intensive application expressed in CSP-based Handel formalism. The interface is formally defined from the semantics of the languages Alpha and Handel. This work will ease the design of compute intensive applications on FPGAs.

U2 - 10.1007/0-306-48734-9_24

DO - 10.1007/0-306-48734-9_24

M3 - Conference contribution

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BT - System Specification & Design Languages

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ER -

Design of highly parallel architectures with Alpha and Handel

Abstract

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