TY - JOUR
T1 - Detection and defence against thermal and timing covert channel attacks in multicore systems
AU - Rahimi, Parisa
AU - Singh, Amit Kumar
AU - Wang, Xiaohang
AU - Pourmoafi, Seyedali
N1 - © 2025 The Authors. Published by Elsevier B.V. This is an open access article under the Creative Commons Attribution Non-Commercial No-Derivatives CC BY-NC-ND licence, https://creativecommons.org/licenses/by-nc-nd/4.0/
PY - 2025/2/27
Y1 - 2025/2/27
N2 - As interest in multicore systems grows, so does the potential for information leakage through covert channel communication. Covert channel attacks pose severe risks because they can expose confidential information and data. Countering these attacks requires a deep understanding of various covert channel attack types and their characteristics. Thermal covert channel and covert timing channel attacks, which use temperature and timing, respectively to transfer information, are two dominant examples that can compromise sensitive data. In this paper, we propose a methodology for jointly detecting and mitigating these types of attacks, which has been lacking in the literature. Our experiments have demonstrated that the proposed countermeasures can increase the bit error rate (BER) for mitigation while maintaining comparable power consumption to that of the state-of-the-art.
AB - As interest in multicore systems grows, so does the potential for information leakage through covert channel communication. Covert channel attacks pose severe risks because they can expose confidential information and data. Countering these attacks requires a deep understanding of various covert channel attack types and their characteristics. Thermal covert channel and covert timing channel attacks, which use temperature and timing, respectively to transfer information, are two dominant examples that can compromise sensitive data. In this paper, we propose a methodology for jointly detecting and mitigating these types of attacks, which has been lacking in the literature. Our experiments have demonstrated that the proposed countermeasures can increase the bit error rate (BER) for mitigation while maintaining comparable power consumption to that of the state-of-the-art.
KW - Countermeasure
KW - Multi-covert channel
KW - Multicore systems
KW - Thermal covert channel
KW - Timing covert channel
UR - http://www.scopus.com/inward/record.url?scp=85218918085&partnerID=8YFLogxK
U2 - 10.1016/j.sysarc.2025.103380
DO - 10.1016/j.sysarc.2025.103380
M3 - Article
SN - 1383-7621
VL - 161
SP - 1
EP - 12
JO - Journal of Systems Architecture
JF - Journal of Systems Architecture
M1 - 103380
ER -