DIGITAL SIGNAL PROCESSING

Paul Findlay (Inventor), Brian Johnson (Inventor), John Guppy (Inventor)

Research output: Patent

Abstract

For more convenient mechanisation, the modulo m reduction of a binary number P can be carried out by conditionally summing the modulo m reductions of a power series of two and then modulo m reducing the sum. The modulo m reductions of the series, called the 'residues' of the series, can be pre-calculated and stored but this may be inconvenient if they are long in terms of numbers of bits. Herein, the residues are calculated in sequence by a recursive process, each residue being calculated from the next preceeding one, this leading to a 'serial' arrangement for generating the residues which can be incorporated into a serial modulo m reduction unit. Such a serial modulo m reduction unit is convenient for implementation as an integrated circuit especially as part of an overall circuit for encryption and decryption of digital signals.
Original languageEnglish
Patent numberEP0350278
IPC 
Priority date4/07/88
Publication statusPublished - 9 Jun 1992

Keywords

  • recursive summing residues
  • modulo reduction

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