Efficient Data Transfer and Multi-Bit Multiplier Design in Processing in Memory

Keyphrases

• Multiplier Design 100%
• Processing-in-memory 100%
• Multi-bit 100%
• Efficient Data Transfer 100%
• Data Transmission 75%
• Memristor 50%
• Logic Operation 50%
• Execution Efficiency 50%
• Crossbar Array 25%
• High Efficiency 25%
• Addition Operation 25%
• Low Power 25%
• SPICE Model 25%
• High Flexibility 25%
• Consumption Efficiency 25%
• Logic Computation 25%
• Data Transfer Efficiency 25%
• Design Scheme 25%
• Low Latency 25%
• Effective Solutions 25%
• Memory-based 25%
• Multiple-input multiple-output 25%
• Power Consumption 25%
• Data Transfer 25%
• Array Structure 25%
• Hot Research Topics 25%
• In-memory Data 25%
• Data Storage 25%
• Von Neumann Bottleneck 25%

Computer Science

• In-Memory Processing 100%
• Execution Efficiency 66%
• Effective Solution 33%
• Logical Operation 33%
• Information Storage 33%
• Research Topic 33%
• Memristor 33%
• Power Consumption 33%
• Data Memory 33%

Engineering

• Data Transfer 100%
• Scheme Design 33%
• Addition Operation 33%
• Pspice Simulation 33%
• Data Memory 33%
• Electric Power Utilization 33%
• Effective Solution 33%
• Multiple-Input Multiple-Output 33%