TY - JOUR
T1 - Fast architecture for decimal digit multiplication
AU - Valikhani, Hadi
AU - Timarchi, Somayeh
AU - Malazi, Hadi Tabatabaee
N1 - Funding Information:
The authors would like to thank Institute for Research in Fundamental Sciences (IPM) which supported this research at the context of research project number CS1390-4-11 .
Publisher Copyright:
© 2015 Elsevier B.V.
PY - 2015/5/31
Y1 - 2015/5/31
N2 - Abstract BCD digit multiplication module (BDM) is widely used in BCD arithmetic, especially in Decimal Floating-Point (DFP) units. In this paper, we present a new BCD digit multiplication scheme to accelerate this module. Similar to previous articles, our multiplier includes two parts contained binary multiplier and binary to BCD converter. Our contribution towards these modules can successfully overcome the previous BCD digit multipliers. The results indicate 19% hardware acceleration for the proposed multiplier architecture which is comparable to the best previous techniques in UMC 65 nm CMOS standard cells library hardware implementation. Therefore, the proposed BCD digit multiplier is an appropriate candidate to be utilized in BCD arithmetic units.
AB - Abstract BCD digit multiplication module (BDM) is widely used in BCD arithmetic, especially in Decimal Floating-Point (DFP) units. In this paper, we present a new BCD digit multiplication scheme to accelerate this module. Similar to previous articles, our multiplier includes two parts contained binary multiplier and binary to BCD converter. Our contribution towards these modules can successfully overcome the previous BCD digit multipliers. The results indicate 19% hardware acceleration for the proposed multiplier architecture which is comparable to the best previous techniques in UMC 65 nm CMOS standard cells library hardware implementation. Therefore, the proposed BCD digit multiplier is an appropriate candidate to be utilized in BCD arithmetic units.
KW - Binary and BCD multiplication
KW - Binary coded decimal (BCD) encoding
KW - Binary to BCD conversion
KW - Computer arithmetic
UR - http://www.scopus.com/inward/record.url?scp=84930081543&partnerID=8YFLogxK
U2 - 10.1016/j.micpro.2015.01.004
DO - 10.1016/j.micpro.2015.01.004
M3 - Article
AN - SCOPUS:84930081543
VL - 39
SP - 296
EP - 301
JO - Microprocessors and Microsystems
JF - Microprocessors and Microsystems
SN - 0141-9331
IS - 4-5
M1 - 2186
ER -