FPGA based intelligent co-operative processor in memory architecture

Z. Ahmad, R. Sotudeh, D.M. Akbar Hussain, Missing Shahab-ud-din

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    100 Downloads (Pure)

    Abstract

    In a continuing effort to improve computer system performance, Processor-In-Memory (PIM) architecture has emerged as an alternative solution. PIM architecture incorporates computational units and control logic directly on the memory to provide immediate access to the data. To exploit the potential benefits of PIM, a concept of Co-operative Intelligent Memory (CIM) was developed by the intelligent system group of University of Hertfordshire, based on the previously developed Co-operative Pseudo Intelligent Memory (CPIM). This paper provides an overview on previous works (CPIM, CIM) and realization of CPIM over two scenarios, cumulative successive addition, and non-cumulative successive addition, using Nexar 2004 EDS tool as a design environment to target device (SPARTAN II, XC2S300E-6PQ208C). The performance (speedup) is then measured against an SISD without significant performance acceleration methods to ensure a speedup assessment obtained against base-line architecture.
    Original languageEnglish
    Title of host publicationIMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011
    PublisherIAENG, International Association of Engineers
    Pages298-302
    Number of pages5
    Volume1
    ISBN (Print)978-988182103-4
    Publication statusPublished - 1 Jan 2011
    EventIMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011 - , Hong Kong
    Duration: 16 Mar 201118 Mar 2011

    Conference

    ConferenceIMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011
    Country/TerritoryHong Kong
    Period16/03/1118/03/11

    Keywords

    • Co-operative intelligent memory (CIM)
    • CPU-major
    • CPU-minor
    • observer
    • processor-in-memory (PIM)
    • shared memory
    • task optimizer

    Fingerprint

    Dive into the research topics of 'FPGA based intelligent co-operative processor in memory architecture'. Together they form a unique fingerprint.

    Cite this