Harnessing the power of GPUs without losing abstractions in SAC and ARRAYOL: A comparative study

J. Guo, Sven-Bodo Scholz, W. Rodrigues, F. Guyomarc'h, P. Boulet, J. Thiyagalingamr

    Research output: Chapter in Book/Report/Conference proceedingOther chapter contribution

    1 Citation (Scopus)

    Abstract

    Over recent years, using Graphics Processing Units (GPUs) has become as an effective method for increasing the performance of many applications. However, these performance benefits from GPUs come at a price. Firstly extensive programming expertise and intimate knowledge of the underlying hardware are essential for gaining good speedups. Secondly, the expressibility of GPU-based programs are not powerful enough to retain the high-level abstractions of the solutions. Although the programming experience has been significantly improved by existing frameworks like CUDA and OPENCL, it is still a challenge to effectively utilise these devices while still retaining the programming abstractions. To this end, performing a source-to-source transformation, whereby a high-level language is mapped to CUDA or OPENCL, is an attractive option. In particular, it enables one to retain high-level abstractions and to harness the power of GPUs without any expertise on the GPGPU programming. In this paper, we compare and analyse two such schemes. One of them is a transformation mechanism for mapping a image/signal processing domain-specific language, ARRAYOL, to OPENCL. The other one is a transformation route for mapping a high-level general purpose array processing language, Single Assignment C (SAC) to CUDA. Using a real-world image processing application as a running example, we demonstrate that albeit the fact of being general purpose, the array processing language be used to specify complex array access patterns generically. Performance of the generated CUDA code is comparable to the OPENCL code created from domain-specific language.
    Original languageEnglish
    Title of host publicationProcs of 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum
    PublisherInstitute of Electrical and Electronics Engineers (IEEE)
    Pages1183-1190
    Number of pages8
    ISBN (Electronic)978-0-7695-4577-6
    ISBN (Print)978-1-61284-425-1
    DOIs
    Publication statusPublished - 1 Jan 2011
    EventIEEE International Symposium 2011: Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW) - Shanghai, China
    Duration: 16 May 201120 May 2011

    Conference

    ConferenceIEEE International Symposium 2011: Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)
    Country/TerritoryChina
    CityShanghai
    Period16/05/1120/05/11

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