We propose an approach for timing analysis of software-based embedded computer systems that builds on the established probabilistic framework of Bayesian networks. We envision an approach where we take (1) an abstract description of the control flow within a piece of software, and (2) a set of run-time traces, which are combined into a Bayesian network that can be seen as an interactive timing profile. The obtained profile can be used by the embedded systems engineer not only to obtain a probabilistic estimate of the WCET, but also to run interactive timing simulations, or to automatically identify software configurations that are likely to evoke noteworthy timing behavior, like, e.g., high variances of execution times, and which are therefore candidates for further inspection.
|Title of host publication||Proc. 8th International Workshop on Worst-Case Execution Time Analysis|
|Publication status||Published - 2008|
|Event||8th Int Workshop on Worst-Case Execution Time Analysis - Prague, Czech Republic|
Duration: 1 Jul 2008 → …
|Conference||8th Int Workshop on Worst-Case Execution Time Analysis|
|Period||1/07/08 → …|