Instruction scheduling for a superscalar architecture

Keyphrases

• Instruction Scheduling 100%
• Superscalar Architecture 100%
• Scheduler 100%
• Hertfordshire 50%
• Performance Potential 50%
• Instruction Execution 50%
• Processor Simulation 50%
• Branch number 50%
• Performance Results 50%
• Superscalar Processor 50%
• Compile Time 50%
• Performance Improvement 50%

Computer Science

• Superscalar 100%
• Instruction Scheduling 100%
• Superscalar Processor 50%
• Processor Model 50%
• Instruction Execution 50%
• Branch Instruction 50%
• Functional Unit 50%