Abstract
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function caches, a special kind of instruction cache that caches whole functions only. This cache was designed with the aim to be more predictable for the worst-case than existing instruction caches. Within this paper we developed a cache analysis technique for the function cache. One of the new concepts of this analysis technique is the local persistence analysis, which allows to precisely model the function cache.
| Original language | English |
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| Title of host publication | 2007 44TH ACM/IEEE Design Automation Conference |
| Place of Publication | NEW YORK |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Pages | 471-476 |
| Number of pages | 6 |
| ISBN (Print) | 978-1-59593-627-1 |
| Publication status | Published - 2007 |
| Event | 44th ACM/IEEE Design Automation Conference - San Diego Duration: 4 Jun 2007 → 8 Jun 2007 |
Conference
| Conference | 44th ACM/IEEE Design Automation Conference |
|---|---|
| City | San Diego |
| Period | 4/06/07 → 8/06/07 |
Keywords
- worst-case execution time
- WCET
- cache analysis
- function cache