Modeling the function cache for worst-case execution time analysis

Raimund Kirner, Martin Schoeberl

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)


Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function caches, a special kind of instruction cache that caches whole functions only. This cache was designed with the aim to be more predictable for the worst-case than existing instruction caches. Within this paper we developed a cache analysis technique for the function cache. One of the new concepts of this analysis technique is the local persistence analysis, which allows to precisely model the function cache.

Original languageEnglish
Title of host publication2007 44TH ACM/IEEE Design Automation Conference
Place of PublicationNEW YORK
Number of pages6
ISBN (Print)978-1-59593-627-1
Publication statusPublished - 2007
Event44th ACM/IEEE Design Automation Conference - San Diego
Duration: 4 Jun 20078 Jun 2007


Conference44th ACM/IEEE Design Automation Conference
CitySan Diego


  • worst-case execution time
  • WCET
  • cache analysis
  • function cache


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