Real-time digital video multiplexer synchronisation implementation with CPLD

A. Herbland; R. Sotudeh

Real-time digital video multiplexer synchronisation implementation with CPLD

A. Herbland
, R. Sotudeh

Centre for Applied Clinical, Health and Care Research (CACHE)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

48 Downloads (Pure)

Abstract

Many video applications in security areas such as close circuit television (CCTV) require multiple video channels which must be multiplexed into a single video streanm. The industry can only afford to have a few frames or fields per camera. This paper emphasises on a novel hardware design using an algorithm for synchronising the analogue video inputs. Therefore the proposed multiplexer system is able to achieve a constant stream of 50 digital video fields per second using a CPLD (Complex Programmable Logic Device) for 625/50 video system.

Original language	English
Title of host publication	ASIC 2003, Procs 5th Int Conf Vol.2
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	914-917
ISBN (Print)	0-7803-7889-X
Publication status	Published - 2003

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@inproceedings{982d2f975b094eab82954e8418a0f5fa,

title = "Real-time digital video multiplexer synchronisation implementation with CPLD",

abstract = "Many video applications in security areas such as close circuit television (CCTV) require multiple video channels which must be multiplexed into a single video streanm. The industry can only afford to have a few frames or fields per camera. This paper emphasises on a novel hardware design using an algorithm for synchronising the analogue video inputs. Therefore the proposed multiplexer system is able to achieve a constant stream of 50 digital video fields per second using a CPLD (Complex Programmable Logic Device) for 625/50 video system.",

author = "A. Herbland and R. Sotudeh",

note = "This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.---- Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.",

year = "2003",

language = "English",

isbn = "0-7803-7889-X",

pages = "914--917",

booktitle = "ASIC 2003, Procs 5th Int Conf Vol.2",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

address = "United States",

}

TY - GEN

T1 - Real-time digital video multiplexer synchronisation implementation with CPLD

AU - Herbland, A.

AU - Sotudeh, R.

N1 - This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.---- Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

PY - 2003

Y1 - 2003

N2 - Many video applications in security areas such as close circuit television (CCTV) require multiple video channels which must be multiplexed into a single video streanm. The industry can only afford to have a few frames or fields per camera. This paper emphasises on a novel hardware design using an algorithm for synchronising the analogue video inputs. Therefore the proposed multiplexer system is able to achieve a constant stream of 50 digital video fields per second using a CPLD (Complex Programmable Logic Device) for 625/50 video system.

AB - Many video applications in security areas such as close circuit television (CCTV) require multiple video channels which must be multiplexed into a single video streanm. The industry can only afford to have a few frames or fields per camera. This paper emphasises on a novel hardware design using an algorithm for synchronising the analogue video inputs. Therefore the proposed multiplexer system is able to achieve a constant stream of 50 digital video fields per second using a CPLD (Complex Programmable Logic Device) for 625/50 video system.

M3 - Conference contribution

SN - 0-7803-7889-X

SP - 914

EP - 917

BT - ASIC 2003, Procs 5th Int Conf Vol.2

PB - Institute of Electrical and Electronics Engineers (IEEE)

ER -

Real-time digital video multiplexer synchronisation implementation with CPLD

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