Reversible implementation of densely-packed-decimal converter to and from binary-coded-decimal format using in IEEE-754R

A. Kaivani, A. Zaker Alhosseini, S. Gorgin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The Binary Coded Decimal (BCD) encoding has always dominated the decimal arithmetic algorithms and their hardware implementation. Due to importance of decimal arithmetic, the decimal format defined in IEEE 754 floating point standard has been revisited. It uses Densely Packed Decimal (DPD) encoding to store significand part of a decimal floating point number Furthermore in recent years reversible logic has attracted the attention of engineers for designing low power CMOS circuits, as it is not possible to realize quantum computing without reversible logic implementation. This paper derives the reversible implementation of DPD converter to and from conventional BCD format using in IEEE 754R.

Original languageEnglish
Title of host publicationProceedings - 9th International Conference on Information Technology, ICIT 2006
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages273-276
Number of pages4
ISBN (Print)0769526357, 9780769526355
DOIs
Publication statusPublished - 2006
Externally publishedYes
Event9th International Conference on Information Technology, ICIT 2006 - Bhubaneswar, India
Duration: 18 Dec 200621 Dec 2006

Publication series

NameProceedings - 9th International Conference on Information Technology, ICIT 2006

Conference

Conference9th International Conference on Information Technology, ICIT 2006
Country/TerritoryIndia
CityBhubaneswar
Period18/12/0621/12/06

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