University of Hertfordshire

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSNs: 1063-8210

IEEE

Scopus rating (2020): CiteScore 5.4 SJR 0.506 SNIP 1.543

Journal

  1. Accurate linear model for SET critical charge estimation

    Rossi, D., Cazeaux, J. M., Omana, M., Metra, C. & Chatterjee, A., Aug 2009, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 17, 8, p. 1161-1166 6 p., 5071147.

    Research output: Contribution to journalArticlepeer-review

  2. Coarse-grained Online Monitoring of BTI Aging by Reusing Power Gating Infrastructure

    Tenentes, V., Rossi, D., Yang, S., Khursheed, S., Al-Hashimi, B. M. & Gunn, S. R., 1 Apr 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 4, p. 1397 - 1407 11 p.

    Research output: Contribution to journalArticlepeer-review

  3. Impact of Bias Temperature Instability on Soft Error Susceptibility

    Rossi, D., Omana, M., Metra, C. & Paccagnella, A., 30 Apr 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 4, p. 743 - 751 9 p.

    Research output: Contribution to journalArticlepeer-review

  4. Low-Cost On-Chip Clock Jitter Measurement Scheme

    Omana, M., Rossi, D., Giaffreda, D., Metra, C., Mak, TM., Raman, A. & Tam, S., 1 Mar 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 3, p. 435 - 443 9 p.

    Research output: Contribution to journalArticlepeer-review

  5. Modeling and Detection of Hotspot in Shaded Photovoltaic Cells

    Rossi, D., Omana, M., Giaffreda, D. & Metra, C., 1 Jun 2015, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23, 6, p. 1031 - 1039 9 p.

    Research output: Contribution to journalArticlepeer-review

  6. Power consumption of fault tolerant busses

    Rossi, D., Nieuwland, A. K., Van Dijk, S. V. E. S., Kleihorst, R. P. & Metra, C., May 2008, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 16, 5, p. 542-552 11 p., 4469920.

    Research output: Contribution to journalArticlepeer-review

  7. Reliable Power Gating With NBTI Aging Benefits

    Rossi, D., Tenentes, V., Yang, S., Khursheed, S. & Al-Hashimi, B. M., 15 Feb 2016, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 8, p. 2735 - 2744 10 p.

    Research output: Contribution to journalArticlepeer-review

  8. Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST

    Omana, M., Rossi, D., Fuzzi, F., Metra, C., Tirumurti, C. & Galivanche, R., 31 Jan 2017, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 1, p. 238 - 246 9 p.

    Research output: Contribution to journalArticlepeer-review