Research output: Contribution to journal › Article › peer-review
Accepted author manuscript, 835 KB, PDF document
Original language | English |
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Article number | 2345303 |
Pages (from-to) | 763-767 |
Number of pages | 5 |
Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
Volume | 61 |
Issue | 10 |
Early online date | 5 Aug 2014 |
DOIs | |
Publication status | Published - 1 Oct 2014 |
The design of a 14-mW receiver without phase-locked loop for the Chinese electronic toll collection (ETC) system in a standard 0.18-μm CMOS process is presented in this brief. Since the previously published work was mainly based on vehicle-powered systems, low power consumption was not the primary goal of such a system. In contrast, the presented system is designed for a battery-powered system. Utilizing the presented receiver architecture, the entire receiver only consumes 7.8 mA, at the supply voltage of 1.8 V, which indicates a power saving of at least 38% compared with other state-of-the-art designs for the same application. To verify the performance, the bit error rate is measured to be better than 10-6, which well satisfies the Chinese ETC standard. Moreover, the sensitivity of the designed receiver can be readjusted to -50 dBm, which is required by the standard.
ID: 11255505