University of Hertfordshire

By the same authors

High Efficiency Cross-Coupled Charge Pump Circuit with Four-Clock Signals

Research output: Contribution to journalArticlepeer-review

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  • YS-2-updated

    Accepted author manuscript, 432 KB, PDF document

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Original languageEnglish
Pages (from-to)565-570
Number of pages6
JournalRadioelectronics and Communications Systems
Volume61
Issue12
DOIs
Publication statusPublished - 1 Dec 2018

Abstract

A fully integrated cross-coupled charge pump circuit for boosting dc-to-dc converter applications with four-clock signals has been proposed. With the new clock scheme, this charge pump eliminates all of the reversion power loss and reduces the ripple voltage. In addition, the largest voltage differences between the terminals of all transistors do not exceed the power supply voltage for solving the gate-oxide overstress problem in the conventional charge pump circuits and enhancing the reliability. This proposed charge pump circuit does not require any extra level shifter; therefore, the power efficiency is increased. The proposed charge pump circuit has been simulated using Spectre in the TSMC 0.18 μm CMOS process. The simulation results show that the maximum voltage conversion efficiency of the new 3-stage cross-coupled circuit with an input voltage of 1.5Vis 99.8%. According to the comparison results of the conventional pump and the enhanced charge pump proposed, the output ripple voltage has been significantly reduced.

Notes

© Allerton Press, Inc. 2018

ID: 16434876