University of Hertfordshire

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Impact of Bias Temperature Instability on Soft Error Susceptibility

Research output: Contribution to journalArticlepeer-review


  • Daniele Rossi
  • Martin Omana
  • Cecilia Metra
  • Alessandro Paccagnella
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Original languageEnglish
Pages (from-to)743 - 751
Number of pages9
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Publication statusPublished - 30 Apr 2015


In this paper, we address the issue of analyzing the effects of aging mechanisms on ICs' soft error (SE) susceptibility. In particular, we consider bias temperature instability (BTI), namely negative BTI in pMOS transistors and positive BTI in nMOS transistors that are recognized as the most critical aging mechanisms reducing the reliability of ICs. We show that BTI reduces significantly the critical charge of nodes of combinational circuits during their in-field operation, thus increasing the SE susceptibility of the whole IC. We then propose a time dependent model for SE susceptibility evaluation, enabling the use of adaptive SE hardening approaches, based on the ICs lifetime.


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